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Layout Design Engineer:
Master’s/Bachelor’s Degree in Electrical/Electronics engineering with 1-3 years of experience in Analog Mixed Signal Layout. Successful candidate would be responsible for layout in advanced CMOS technologies including floorplan, placement, routing, DRC, LVS etc. You should have worked on FinFet technology (16/7nm and below) on various analog mixed signal blocks such as PLL, Bandgap, ADC, DAC, SERDES, IO etc. Engineer should be well versed with tools such as Virtuoso/XL/GXL/EXL, IC12.1/20.1, Calibre etc. You are required to work with circuit designers to meet design specifications. This job requires excellent teamwork, good communication and strong problem solving skill.
· Responsible for planning and execution of layout for various designs in 7nm technology nodes and below.
· Hands on experience in all stages of the design such as Floorplanning, Placement, Layout, Physical Verification etc.
· Strong debug capabilities with parasitic extraction, LVS/DRC and other Physical verification checks.
· Knowledge of scripting languages like SKILL, PERL, TCL etc. is desirable.
· Strong problem solving skills.
· Excellent communication skills.
· Sound knowledge of device matching, pitch matching etc.
Master’s/Bachelor’s Degree in Electrical/Electronics engineering
Years of Experience