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Senior Product Management Engineer

161721
San Jose, CA, United States
Nov 25, 2021

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Job Description

Description

At Xilinx, we are leading the industry transformation to build an adaptable, intelligent world. ARE YOU bold, collaborative, and creative? We develop leaders and innovators who want to revolutionize the world of technology. We believe that by embracing diverse ideas, pushing boundaries, and working together as ONEXILINX, anything is possible.

Our culture of innovation began with the invention of the Field Programmable Gate Array (FPGA), and with the 2018 introduction of our Adaptive Compute Acceleration Platform (ACAP), has made a quantum leap in capability, solidifying our role as the adaptable platform supplier of choice. From the beginning, we have always believed in providing inventors with products and platforms that are infinitely adaptable. From self-driving cars, to world-record genome processing, to AI and big data, to the world's first 5G networks, we empower the world's builders and visionaries whose ideas solve every day problems and improve people's lives.

If you are PASSIONATE, ADAPTABLE, and INNOVATIVE, Xilinx is the right place for you! At Xilinx, we care deeply about creating significant development experiences while building a strong sense of belonging and connection. We champion an environment of empowered learning, wellness, community engagement, and recognition, so you can focus on work that matters - world class technology that improves the way we live and work. We are ONEXILINX.

Product Management Engineer - AI Engine

Xilinx is looking for a world class Applications Engineer to help us build and support the next-generation, parallel programming environment for the newly announced Versal, the industry's first adaptive compute acceleration platform (ACAP). Versal devices combine processors, FPGA fabric and new AI engines to deliver powerful heterogeneous acceleration for any application.

As a member of the team, you will be responsible for driving the features, methodology and collateral around the software development flow for Versal, with a particular focus on the AI Engines, an array of VLIW SIMD high-performance processors optimized for compute-intensive applications like 5G cellular and machine learning DNN/CNN. You will be working in a broad area collaborating with software development and marketing to help guide the development of the Versal AI Engine tool flow and its integration with Xilinx’s Vivado and Vitis FPGA design tools. You will also be working with customers and helping them with the successful adoption of this flow. You will get a chance to tackle cutting-edge problems supporting tools for heterogeneous multicore systems.

Your passion for advancing development tools and methodologies for heterogenous computing will make the difference. 

Responsibilities:

  • Driving successful adoption of Xilinx AI Engine and Vitis tool flows
  • Drive the evolution of tools and features related to the Xilinx AI Engine flows in Vitis by collaborating with engineering and helping drive tool features
  • Provide Technical expertise to the field and customers, including creating tutorials, and user guides.
  • Provide post-sales support, including lab debug, performance analysis, software and hardware programming, and power analysis for high profile customer engagements
  • Create designs to demonstrate Xilinx's values on silicon, IP targeting Xilinx’s AI Engine


Job Requirements

  • Must have experience in the following areas:
    • Experience with programming and scripting skills around C, C++, Python(optional)
    • Experience with using FPGAs
    • Excellent written and verbal communication skills, presentations skills, and the ability to work with multiple groups
  • Experience in at least one of these areas is a major plus
    • Experience with Xilinx Vivado or Vitis tool flows
    • Experience in DSP programming is highly desirable in 5G/machine learning domains
    • Experience with any one of the following paradigms: multi-core architectures, parallel programming, energy-efficient architecture, and SIMD/ VLIW designs
    • Experience with explaining technical systems

Education Requirements/Experience:

BS/MS (Masters Degree preferred) in CS/EE with a minimum of 3+ years’ experience developing/supporting FPGA programming, optimization and debug techniques. 
 

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