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Xilinx is looking for a developer with expertise in modeling power consumption of complex HW architectures.
As part of the Device Power Modeling team, the candidate will be responsible for the definition, development, validation and release of power models and modeling tools for all of Xilinx’s All Programmable FPGAs, SoCs, 3D ICs and ACAP devices. Xilinx’s new hardware programmable SoC FPGAs and Adaptive Compute Acceleration Platform (ACAP) deliver most dynamic processor technology and are achieving record performances in Data Center, Wireless/5G, Automotive/ADAS and Emulation applications. These new applications and heterogeneous computing architecture brings in new challenges in power modeling, especially early power estimation of large scale user designs that solve complex acceleration or AI/ML problems.
The position requires strong programming fundamentals preferably in C++ and good understanding of power aspects of analog, digital and mixed signal circuits.
• Bachelors in EE/CE/CS with 7 years or Masters in EE/CE/CS with 5 year of relevant experience
• Experience with software development in C++
• Experience in object-oriented design and programming
• Self-sufficient and proficient in software development concepts and methods, coding, and debugging
• Proactively identifies and delivers solutions that reduce development and support costs
• Capable of developing a single project in its entirety
• Demonstrates technical flexibility and adaptability in developing in new and shifting software development and test environments
• Perl, TCL, Python scripting, complex Excel spreadsheet development and Excel VBA development experience
• Cross-functional team work experience (SW/HW/Package/Thermal/Production)