Xilinx is looking for a talented individual to join the Wired IP Solutions Group (WISG) in the position of Networking Timing Solution Architect. The successful candidate will join our development team, creating ASIC and FPGA-based intellectual property and Software to address the needs of state-of-the-art communications systems.
The demands of 5G wireless and IIoT applications are pushing the bounds of timing accuracy and quality of service within wired communications. The Timing Solution Architect will work with Xilinx’s customers and internal engineering teams to define next generation time distribution IP solutions and Time Sensitive Networking IP. In addition to leading IP developments, the Architect will engage in proof of concept demonstrations and development of industry standards.
It is expected that the candidate will have had experience in the design and deployment of timing distribution solutions for wireless, transport or other high-accuracy applications. In addition, candidates should have experience with the design of Time Sensitive Networking (TSN) systems. Experience should include understanding of the physical elements in such systems (e.g. Oscillators, DLLs) as well as the protocols running over the network (e.g. PTP, time aware QoS).
In addition to strong technical abilities, the position requires excellent written and verbal communication skills that will be utilized for developing design specifications and fostering collaboration. Using these communications skills the candidate would be able to produce reports and presentations to internal and customer audiences or standards bodies. Lastly, the candidate should also have experience leading and mentoring junior engineers, and coordinating engineering tasks.
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Years of Experience