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Design Engineer (1 Year Contract)

160623
Singapore, Singapore, Singapore
Nov 9, 2021

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Job Description

Description

At Xilinx, we are leading the industry transformation to build an adaptable, intelligent world. ARE YOU bold, collaborative, and creative? At Xilinx, we hire and develop leaders and innovators who want to revolutionize the world of technology. We believe that by embracing diverse ideas, pushing boundaries, and working together as ONEXILINX, anything is possible.

Our culture of innovation began with the invention of the Field Programmable Gate Array (FPGA), and with the 2018 introduction of our Adaptive Compute Acceleration Platform (ACAP), has made a quantum leap in capability, solidifying our role as the adaptable platform supplier of choice. From the start, we have always believed in providing inventors with products and platforms that are infinitely adaptable. From self-driving cars, to world-record genome processing, to AI and big data, to the world's first 5G networks, we empower the world's builders and visionaries whose ideas solve every day problems and enhance people's lives.

If you are PASSIONATE, ADAPTABLE, and INNOVATIVE, Xilinx is the right place for you! At Xilinx we care deeply about creating meaningful development experiences while building a strong sense of belonging and connection. We foster an environment of empowered learning, wellness, community engagement, and recognition, so you can focus on work that matters - world class technology that improves the way we live and work. We are ONEXILINX.

 

Job Description

This is a post-silicon validation engineer position in the Wired and Wireless Group to perform but not limited to key activities as silicon bring up, functional verification and performance optimization, silicon issue debug and protocol compliance tests with a focus on high speed IO SerDes.

 

 

Requirements

  • Education : Bachelors/Masters degree in Electrical/Electronics/Computer Engineering
  • Experience in high speed IO SerDes (PHY/PCS) design/validation, pre-/post-silicon verification.
  • Extensive knowledge of the physical and protocol levels of latest industry standards such as PCIe, Display Port, JESD, SDI, OIF-CEI-11G/25G/56G/112G-VSR/SR/MR/LR, IEEE 802.3 KR/CR/CAUI/GAUI etc.
  • Strong programming/scripting skills (eg. Python, C/C++, Perl, TCL et.) for firmware development, test methodology development and test automation
  • Hands on experience and strong knowledge with FPGA/ASIC based SerDes debug techniques and methodologies
  • Extensive experience with common lab equipment, including BERT, analyzers, oscilloscopes, PNA/VNA etc
  • In-depth knowledge of SerDes general architectures and link level system analysis is an asset
  • Experience in system level serial link analysis and simulation, system performance optimization and standard/architecture level study using tools such as Python, Matlab, ADS etc. is an added advantage.
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