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The System Validation team plays a key role in validation of complex SOCs in pre-silicon and post silicon. Our most recent project has been for the ground-breaking Versal devices, with dual-core ARM A72 processing system and programmable logic. We are looking for a passionate engineer to work with us on our next generation SoC.
We are looking for aspiring Systems Design Engineer with a strong background in software to join the System-level Test team in San Jose. As a system validation engineer, you will be involved in the silicon life-cycle from testing of emulated next-generation RTL through to silicon verification and characterization. You will have a view of the full system but also will become an expert in certain IP down to the register-level. We are looking for someone who can span the range of able to develop device drivers in software to debug on hardware. As an intern in our team, you will gain real engineering experience in working with complex SOC and validation software, and make a difference to the quality of our products.
Assist in bringing up system level validation tool on new silicon
Run regressions and experiments to help root cause issues
Enhance existing test software for system-level validation and verification of existing and new FPGA features.
Design, develop, implement, test, and verify systems based on Xilinx FPGAs with embedded MicroBlaze or ARM processors
Help to develop novel methods for system-level modeling and verification
Help automate design, test and build processes
Must be a student enrolled in a Bachelors or student in a Masters Degree program in Electrical / Computer Engineering with an emphasis on embedded system development and/or computer architecture. Must have taken computer architecture class.
Programming languages: C, Python, Verilog
To support our group, we are looking for a 4-12 month intern. Shorter internships will NOT be considered. Ideally, working full time (40 hours per week).