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Design Engineer II

160036
San Jose, CA, United States
May 18, 2021

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Job Description

Description

At Xilinx, we are leading the industry transformation to build an adaptable, intelligent world. ARE YOU bold, collaborative, and creative? We develop leaders and innovators who want to revolutionize the world of technology. We believe that by embracing diverse ideas, pushing boundaries, and working together as ONEXILINX, anything is possible.

Our culture of innovation began with the invention of the Field Programmable Gate Array (FPGA), and with the 2018 introduction of our Adaptive Compute Acceleration Platform (ACAP), has made a quantum leap in capability, solidifying our role as the adaptable platform supplier of choice. From the beginning, we have always believed in providing inventors with products and platforms that are infinitely adaptable. From self-driving cars, to world-record genome processing, to AI and big data, to the world's first 5G networks, we empower the world's builders and visionaries whose ideas solve every day problems and improve people's lives.

If you are PASSIONATE, ADAPTABLE, and INNOVATIVE, Xilinx is the right place for you! At Xilinx, we care deeply about creating significant development experiences while building a strong sense of belonging and connection. We champion an environment of empowered learning, wellness, community engagement, and recognition, so you can focus on work that matters - world class technology that improves the way we live and work. We are ONEXILINX.

Role Description

As a member of the PCIe and Serial Connectivity Team you will develop and productize next generation PCIe and connectivity solutions to enable data center applications and fuel the data center transformation. Join us in creating leading edge PCIe technology to shape the future of data processing and cloud technologies. 

As a Senior Design Engineer, you will work as part of a team responsible for all phases of development for from definition to execution and productization of PCIe products. You will participate in technical role in all phases of the product development cycle from new product exploration, architecture through implementation, prototyping, validation, productization and support including but not limited to Architecture, design, and documentation for IPs. Work on the specification, development, validation, and support for products through the product life. Assist engineering management and marketing to specify future IP products and future product enhancements. Develop comprehensive testing plans including Compliance and Interop testing Critically. Review and provide feedback on the Design Implementations and Verification plans. Coordinate IP block delivery with software and IC design teams.This position requires excellent communication, delivery focus, technical expertise, and working through complex challenges and obstacles.

Requirements

  • BS+2 years or an MS in Electrical Engineering or Computer Engineering or related equivalent
  • Programming languages including Verilog, SystemVerilog, and scripting tools like Python, Shell
  • Excellent communication and cross functional coordination
  • Strong knowledge of FPGA architecture and design flows
  • Evaluating high level needs, feasibility and implementation
  • Contribute process improvement to impact productivity
  • Experience with PCIe and/or DMA use is a plus
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