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FPGA Design Engineer

159603
Hyderabad, India, India
Jan 18, 2021

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Job Description

Description

Job Description:

  • Responsible for performing RTL coding in Verilog
  • Design, implementation, test, integration and delivery of system level digital designs for FPGA blocks timing verification
  • Develop design specifications based on project requirements
  • Provide project schedule estimates, progress updates and technical risk identification
  • He needs to perform task of debugging design timing related issues on different FPGA families
  • He is required to provide adequate laboratory assistance
  • He is also needed to perform the work of manifold segmentation of the FPGA designs
  • Need to maintain an effective means of communication among intra- and inter department personals
  • Ensure to complete design and timing verification tasks within allotted timelines

Job Requirements:

  • Bachelors or Masters in Electronics engineering
  • 4 - 7 years of experience in reputed semiconductor companies
  • Expertise in FPGA platforms like XILINX/Altera. Should be knowledgeable about all the internal blocks of FPGA like DSP, BRAM, I/O etc
  • Expertise in digital hardware designing using Verilog on large Xilinx/altera FPGAs
  • Knowledge of Xilinx Vivado or Altera Quartus
  • Expertise in implementing complex FPGA IP design and resolving complex resource and timing closure challenges
  • Scripting in perl, tclk/tk
  • Ability to word individually and in a team
  • Strong team player
  • Good problem solving skills
  • Flexible and adaptable
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