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Senior ASIC/SOC Design Engineer

159276
San Jose, CA, United States
Dec 23, 2020

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Job Description

Description

Xilinx is seeking an ASIC/SOC design engineer for development of high-performance, low-power processor engines for accelerating machine learning/artificial intelligence applications. As part of the front-end design team, you will play a key role in the silicon development of the next-generation product family.

Your responsibilities include:

  • Develop specification of the processor micro-architecture
  • RTL implementation of key building blocks of the processor
  • Analyze performance and make implementation choices to optimize timing
  • Analyze and optimize design for power efficiency and power integrity
  • Work with verificaton and physical design teams to achieve high quality design and successful tapeout
  • Solve customer problems through innovative enhancements to product architecture/ micro-architecture

 

BSEE or equivalent with 10 years of experience, or MSEE or equivalent with 7 years of experience in ASIC/SOC design
Strong knowledge of ASIC design flow and direct experience with ASIC design in sub-20nm technology nodes
Strong knowledge of digital design and experience with RTL design in Verilog/SystemVerilog
Strong knowledge of of circuit timing/STA, and practical experience with PrimeTime or equivalent tools
Strong knowledge of low power digital design and analysis
Experience in following is highly desired:

  • Understanding of FPGA architecture and implementation flow
  • TCL, Perl, Python scripting
  • Modern SOC tools including Spyglass, Questa CDC, Cadence Conformal, VCS simulation
  • Version control systems such as Perforce, ICManage or Git

Strong communication (verbal and written) and presentation skills
Good organization and self-starter

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