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Design Intern - SoC Integration

159252
San Jose, CA, United States
Oct 20, 2020

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Job Description

Description

At Xilinx, we are leading the industry transformation to build an adaptable, intelligent world. ARE YOU bold, collaborative, and creative? We develop leaders and innovators who want to revolutionize the world of technology. We believe that by embracing diverse ideas, pushing boundaries, and working together as ONEXILINX, anything is possible.

Our culture of innovation began with the invention of the Field Programmable Gate Array (FPGA), and with the 2018 introduction of our Adaptive Compute Acceleration Platform (ACAP), has made a quantum leap in capability, solidifying our role as the adaptable platform supplier of choice. From the beginning, we have always believed in providing inventors with products and platforms that are infinitely adaptable. From self-driving cars, to world-record genome processing, to AI and big data, to the world's first 5G networks, we empower the world's builders and visionaries whose ideas solve every day problems and improve people's lives.

If you are PASSIONATE, ADAPTABLE, and INNOVATIVE, Xilinx is the right place for you! At Xilinx, we care deeply about creating significant development experiences while building a strong sense of belonging and connection. We champion an environment of empowered learning, wellness, community engagement, and recognition, so you can focus on work that matters - world class technology that improves the way we live and work. We are ONEXILINX.

As an intern on the SoC Physical Integration team, you'll work closely with senior engineers to perform various tasks depending on the stage of the project.  Common essential duties and responsibilities include, but are not limited to: 
 
- Assisting senior engineers in the development of design flows and methodologies
- Developing and debugging test cases to validate flows and methodologies for circuit checking tools
- Assisting senior engineers in design and/or verification of sub-blocks of the FPGA
- Writing scripts to improve efficiency

Education Requirements

- Knowledge of and/or experience with design tools such as Virtuoso
- Fundamental circuit design knowledge including simulation experience with Spice
- Strong debug skills
- Scripting experience using Perl or other scripting languages
- Knowledge and experience with basic Unix data management and job control
- Excellent written and oral communication skills
 
Minimum education level/Experience:  Junior pursuing BSEE; Student pursuing MSEE recommended

Duration: 12 months, Full-time (40 hours per week)

We are looking for someone to start between October 2020- January 2021

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