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Senior Systems Design Engineer 2

158373
Hyderabad, India, India
May 20, 2020

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Job Description

Description

At Xilinx, we are leading the industry transformation to build an adaptable, intelligent world. ARE YOU bold, collaborative, and creative? At Xilinx, we hire and develop leaders and innovators who want to revolutionize the world of technology. We believe that by embracing diverse ideas, pushing boundaries, and working together as ONEXILINX, anything is possible.

Our culture of innovation began with the invention of the Field Programmable Gate Array (FPGA), and with the 2018 introduction of our Adaptive Compute Acceleration Platform (ACAP), has made a quantum leap in capability, solidifying our role as the adaptable platform supplier of choice. From the start, we have always believed in providing inventors with products and platforms that are infinitely adaptable. From self-driving cars, to world-record genome processing, to AI and big data, to the world's first 5G networks, we empower the world's builders and visionaries whose ideas solve every day problems and enhance people's lives.

If you are PASSIONATE, ADAPTABLE, and INNOVATIVE, Xilinx is the right place for you! At Xilinx we care deeply about creating meaningful development experiences while building a strong sense of belonging and connection. We foster an environment of empowered learning, wellness, community engagement, and recognition, so you can focus on work that matters - world class technology that improves the way we live and work. We are ONEXILINX.


Job Description 

Xilinx is looking for a talented individual to join the DFE Technology team in the position of Sr Systems Design Engineer. This team develops high performance and low cost digital front end (DFE) Radio designs for 5G base stations and DOCSIS Remote-PHY applications with Xilinx’s unique RFSoC and Versal products and influences future device architectures. As Sr. Systems Design Engineer, you will have the opportunity to work on, architect Wireless/Wired Communication embedded systems and develop building blocks required for Digital Front End for these Communication systems.

Key Responsibilities 

·      Develop and lead the integration of DSP blocks related to Digital front end for 4G/5G base-stations.

·      Execute 4G/5G test cases in Xilinx’s Lab and replicate faults reported by customer.   

·      Work within the team to define detailed design requirements, as well as providing FPGA based architectural expertise and guidance.

·      Work with geographically distributed teams and lead technical activities for customer trials and deployments.

·      Responsible for writing Matlab and C/C++ to emulate system test conditions

·      Perform system’s performance analysis, prepare customer presentations with appropriate system staging.   

·      Proposes solutions for customer specific requirements.

·      Develops innovative but practical solutions to advanced technical problems in engineering.


Technical Skill Requirements
  • Masters degree in Electronics Engineering or equivalent preferred
  • 10+ years Communication Systems Engineering or related work experience.
  • 10+ years of hands on experience developing Communication systems on FPGAs.
  • Broad knowledge of systems engineering concepts (definition and analysis for requirements, performance, capacity, availability, reliability, scalability, etc.)
  • Hands on experience in designing and implementing Digital Signal Processing blocks using VHDL/Verilog.
  • Experience with coding signal processing kernels on DSP processors and/or SIMD and VLIW processor architectures is a plus.
  • Excellent understanding of cellular systems building blocks, with focus on LTE and 5G. Experience in integrating these building blocks is required.
  • Practical experience with designing the 5G wireless solutions a definite plus.
  • Deep understanding of wireless systems performance and features impact/trade-offs.
  • Experience in validation with Emulators and FPGA evaluation boards is highly desirable.
  • Understanding of data interfacing protocols eCPRI, AXI-Stream, AXI etc is desirable. 
  • Demonstrable proficiency with scripting language like Perl/Python/Tcl is required.
  • Understanding of formal verification/assertions, LINT and CDC tool is desirable.
  • Excellent documentation, presentation and communications skills.

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