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Physical Design Manager

157941
Hyderabad, India, India
Sep 16, 2019

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Job Description

Description

At Xilinx, we are leading the industry transformation to build an adaptable, intelligent world. ARE YOU bold, collaborative, and creative? At Xilinx, we hire and develop leaders and innovators who want to revolutionize the world of technology. We believe that by embracing diverse ideas, pushing boundaries, and working together as ONEXILINX, anything is possible.

Our culture of innovation began with the invention of the Field Programmable Gate Array (FPGA), and with the 2018 introduction of our Adaptive Compute Acceleration Platform (ACAP), has made a quantum leap in capability, solidifying our role as the adaptable platform supplier of choice. From the start, we have always believed in providing inventors with products and platforms that are infinitely adaptable. From self-driving cars, to world-record genome processing, to AI and big data, to the world's first 5G networks, we empower the world's builders and visionaries whose ideas solve every day problems and enhance people's lives.

If you are PASSIONATE, ADAPTABLE, and INNOVATIVE, Xilinx is the right place for you! At Xilinx we care deeply about creating meaningful development experiences while building a strong sense of belonging and connection. We foster an environment of empowered learning, wellness, community engagement, and recognition, so you can focus on work that matters - world class technology that improves the way we live and work. We are ONEXILINX.

 

 

Role:                                 Design Engineering Manager (Physical Design).

Experience:                    12+ Years.

Education:                      Bachelors or Masters in Electrical/Electronics Engineering. 

Job Location:                  Hyderabad

Requirements:

Should have 12+ years of experience in Physical Design Methodologies and Full Chip Design.

Automation skills TCL, Perl are must.

Should have experience with 16/7nm design methodology.

Should have lead team of 6 members and well versed with Resourcing, Scheduling, Tracking, Goal Setting and Performance evaluations.

Responsibility:

Should own and drive the Physical Implementation of multiple designs of next gen 7nm SOC.

Role involves interaction with multiple design teams, CAD teams, Tool vendors, (on and cross sites),

understand and drive the requirements, define the design implementation methodology,

Resource allocation, Scheduling, Resource Management and Risk management etc.

Ability to learn, make progress and critical times and agility is preferred.

 

 

 

 

Role:                                 Design Engineering Manager (Physical Design).

 

Experience:                    12+ Years.

 

Education:                      Bachelors or Masters in Electrical/Electronics Engineering. 

 

Job Location:                  Hyderabad

 

Requirements:

 

Should have 12+ years of experience in Physical Design Methodologies and Full Chip Design.

 

Automation skills TCL, Perl are must.

 

Should have experience with 16/7nm design methodology.

 

Should have lead team of 6 members and well versed with Resourcing, Scheduling, Tracking, Goal Setting and Performance evaluations.

 

Responsibility:

 

Should own and drive the Physical Implementation of multiple designs of next gen 7nm SOC.

 

Role involves interaction with multiple design teams, CAD teams, Tool vendors, (on and cross sites),

 

understand and drive the requirements, define the design implementation methodology,

 

Resource allocation, Scheduling, Resource Management and Risk management etc.

 

Ability to learn, make progress and critical times and agility is preferred.

 

 

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