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The Silicon development team is looking for an experienced verification engineer in Xilinx India, for the verification of next generation Cache Coherency Systems
Responsibilities include the following:
· Work with Architecture, design, emulation and application teams and contribute to the verification of the next generation of Cache Coherency Systems
· Play a key role in the development of different verification platforms in System Verilog/UVM including utilization of Emulation/Prototyping platforms for verifying next generation coherent MPSOC FPGA designs
· Verify the architecture and performance of the design
· Work with Architecture and Emulation teams to ensure micro-architecture and design is fully verified/validated across multiple platforms
· Be responsible for a comprehensive verification plan and drive the implementation of verification test cases from applications and other sources
· Masters in electrical or computer engineering
· 5+ total of which 2+ years of experience in the verification of Processor and Cache Coherency Systems
· Experience in specifying and developing the verification infrastructure for verifying processor based designs
· Understanding of coherency, cache design and protocols
· Strong analytical problem solving, and attention to details
· Strong experience in HDL, verification, and general computational logic design/verification concepts
· Expertise in Verilog/System Verilog, UVM, Scripting languages like Perl/Python, etc.
· Excellent written and verbal communication skills
· Excellent interpersonal skills, self-motivated