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Senior Design Engineer

157292
San Jose, CA, United States
May 15, 2019

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Job Description

Description

Xilinx develops highly flexible and adaptive processing platforms that enable rapid innovation across a variety of technologies - from the endpoint to the edge to the cloud. Xilinx is the inventor of the FPGA, hardware programmable SoCs and the ACAP (Adaptive Compute Acceleration Platform), designed to deliver the most dynamic processor technology in the industry and enable the adaptable, intelligent and connected world of the future in a multitude of markets including Data Center (Compute, Storage and Networking); Wireless/5G and Wired Communications; Automotive/ADAS; Emulation & Prototyping; Aerospace & Defense; Industrial Scientific & Medical, and others. Xilinx's core strengths simultaneously address major industry trends including the explosion of data, heterogeneous computing after Moore's Law, and the dawn of artificial intelligence (AI).

Our global team is growing and we are looking for bold, collaborative and creative people to help us lead the industry transformation to build an adaptable intelligent world. We believe that by embracing diverse ideas, striving for excellence in all that we do, and working together as a unified team, we can accomplish anything. Come do your best work and live your best life as part of the ONEXILINX team!

 

Responsibilities:

 

This position in the Data Center Group  is a lead technical role in all phases of the product development cycle from implementation, prototyping, validation and support including: 

  • Participating in IP design, Validation, issue debug and productization.
  • Working with cross functional teams in reviewing and creating validation plans and ensure the product is delivered with high quality.
  • Experience with post-silicon validation, debug, and performance characterization, high speed interface characterization and compliance/interoperability.
  • Detailed understanding of high speed interfaces like PCIe, Ethernet and DDR.
  •  Working knowledge of Verilog, System Verilog, programming languages (C/C++/Java) and scripting languages (Python/TCL etc) desired.
  • Experience in system level validation and debug of system solutions.
  • Expertise with FPGA architecture and software tools highly desired.
  • Experience with high speed logic design, timing optimization design techniques, and simulation is required.
  • Familiarity with PCIe protocol debugging and using Protocol analyzers like Lecroy.
  • Strong oral and written communication skills are essential.
  • Ability to work collaboratively with other engineers.


Education and Experience Requirements:

  • BS 5+ years of exp. MS 3+ years of exp or PhD in Electrical Engineering, Computer Engineering or related equivalent



 

 

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