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IC Design Engineer

157259
San Jose, CA, United States
Jun 21, 2019

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Job Description

Description

At Xilinx, we are leading the industry transformation to build an adaptable, intelligent world. ARE YOU bold, collaborative, and creative? At Xilinx, we hire and develop leaders and innovators who want to revolutionize the world of technology.  We believe that by embracing diverse ideas, pushing boundaries, and working together as ONEXILINX, anything is possible. 

Our culture of innovation began with the invention of the Field Programmable Gate Array (FPGA), and with the 2018 introduction of our Adaptive Compute Acceleration Platform (ACAP), has made a quantum leap in capability, solidifying our role as the adaptable platform supplier of choice.  From the start, we have always believed in providing inventors with products and platforms that are infinitely adaptable. From self-driving cars, to world-record genome processing, to AI and big data, to the world’s first 5G networks, we empower the world’s builders and visionaries whose ideas solve every day problems and enhance people’s lives.

If you are PASSIONATE, ADAPTABLE, and INNOVATIVE, Xilinx is the right place for you!  At Xilinx we care deeply about creating meaningful development experiences while building a strong sense of belonging and connection. We foster an environment of empowered learning, wellness, community engagement, and recognition, so you can focus on work that matters – world class technology that improves the way we live and work. We are ONEXILINX.

Job Description: 

Design and develop electronic components. Specifically, work on digital design of clock management blocks (eg, PLL, DLL) and clock distribution for next generation FPGAs. Involved in the entire design process including RTL design and functional verification, schematic generation and/or synthesis, place and route, timing and electrical verification, and working with test engineers on silicon verification and characterization.


Special Requirements:
Should have coursework, advance level coursework, project background, or experience in the following:
1) Transistor level and standard cell-based design and verification;
2) SPICE and Static Timing Analysis (STA) simulators;
3) Programming in Verilog for design and DFT;
4) Phase Locked Loops (PLL) operation and design;


Following a plus:
1) Reading/Writing scripts in PERL or Python;
2) Writing constraints for STA and layout synthesis; and,
3) Test engineering and silicon debug.


Requirements 
  • Master’s degree or foreign equivalent in Electrical Engineering,
  • Bachelor's degree in Electrical Engineering with 2-3 years experience
  • 1-2 years of experience
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