Xilinx develops highly flexible and adaptive processing platforms that enable rapid innovation across a variety of technologies - from the endpoint to the edge to the cloud. Xilinx is the inventor of the FPGA, hardware programmable SoCs and the ACAP (Adaptive Compute Acceleration Platform), designed to deliver the most dynamic processor technology in the industry and enable the adaptable, intelligent and connected world of the future in a multitude of markets including Data Center (Compute, Storage and Networking); Wireless/5G and Wired Communications; Automotive/ADAS; Emulation & Prototyping; Aerospace & Defense; Industrial Scientific & Medical, and others. Xilinx's core strengths simultaneously address major industry trends including the explosion of data, heterogeneous computing after Moore's Law, and the dawn of artificial intelligence (AI).
Our global team is growing and we are looking for bold, collaborative and creative people to help us lead the industry transformation to build an adaptable intelligent world. We believe that by embracing diverse ideas, striving for excellence in all that we do, and working together as a unified team, we can accomplish anything. Come do your best work and live your best life as part of the ONEXILINX team!
Responsible for design and implementation of DDRx/LPDDRx/MIPI high speed interfaces.
- Micro architecture and RTL implementation.
- Hands on experience with RTL coding, block level test bench development and verification, LINT, CDC, synthesis, DFT insertion, timing constraint development, and STA
- Strong foundation on source synchronous interfaces such as DDRx/LPDDRx/MIPI protocols.
- Experience on high speed interface designs.
- Strong written and verbal communication skills
- Strong foundation in SoC design flows, analytical problem solving and attention to detail
- Knowledge on scripting (Python/perl)
B.S or M.S in Electrial engineering, Computer engineering or related equivalent.
Years of Experience
BS with 12+ years or MS with 10+ years of relevant design experience.