Evaluate reliability of materials, properties and techniques used in production of next generation Field Programmable Gate Arrays (FPGAs) and related integrated circuits. Plan, design, and implement next generation FPGA-based intellectual property (IP) blocks for System Interconnect protocols such as PCI Express, Quick Path Interconnect and other similar protocols. Deliver world-class products that set the industry standard for quality, ease of use and customer support. Responsible for the definition, architecture, and micro-architecture of these interconnect protocol blocks. Work on implementation of FPGA hard IP blocks and companion soft solution IP blocks.
· 2 years of experience as Hardware Developer or related occupation.
· Will also accept Bachelor’s degree or foreign equivalent in Electrical Engineering or related field plus 5 years progressive experience in position or related occupation.
· Must have at least 1 year of prior work experience in each of the following:
1. Analysis and debugging of RTL design issues
2. Functional coverage planning/development skills
3. Object oriented programming language such as C++ or System Verilog
4. Complex random-constraint verification methodology
6. Verilog HDL
7. EDA simulation and debug tools such as Synopsys VCS or Cadence NCSIM