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Design Engineer

156739
San Jose, CA, United States
Mar 1, 2019

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Job Description

Description

Xilinx develops highly flexible and adaptive processing platforms that enable rapid innovation across a variety of technologies - from the endpoint to the edge to the cloud. Xilinx is the inventor of the FPGA, hardware programmable SoCs and the ACAP (Adaptive Compute Acceleration Platform), designed to deliver the most dynamic processor technology in the industry and enable the adaptable, intelligent and connected world of the future in a multitude of markets including Data Center (Compute, Storage and Networking); Wireless/5G and Wired Communications; Automotive/ADAS; Emulation & Prototyping; Aerospace & Defense; Industrial Scientific & Medical, and others. Xilinx's core strengths simultaneously address major industry trends including the explosion of data, heterogeneous computing after Moore's Law, and the dawn of artificial intelligence (AI).

Our global team is growing and we are looking for bold, collaborative and creative people to help us lead the industry transformation to build an adaptable intelligent world. We believe that by embracing diverse ideas, striving for excellence in all that we do, and working together as a unified team, we can accomplish anything. Come do your best work and live your best life as part of the ONEXILINX team!

 

As a SerDes Applications team member, you will use your knowledge of high-speed SerDes and Ethernet MAC to provide a world-class solution for the customers.
 
Responsibilities include:
  • Perform block level or system level validation for the Ethernet MAC using various test equipment
  • Develop use models, emulation and validation test platform for the transceiver and Ethernet MAC  
  • Develop reference design or interface logic for various transceiver or Ethernet applications
  • Create collateral such as user guides, data sheets and application notes

 

Qualifications:
  • BS in EE, CE or related fields with 2+ years of work experience or MS in EE, CE or related field
  • Knowledge of Verilog/VHDL, C/C++, and FPGA design
  • Experience in Perl or Python
  • Hands-on experience with high-bandwidth oscilloscopes, BERTs and protocol test equipment
  • Excellent verbal and written communication skills
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