DescriptionXilinx develops highly flexible and adaptive processing platforms that enable rapid innovation across a variety of technologies - from the endpoint to the edge to the cloud. Xilinx is the inventor of the FPGA, hardware programmable SoCs and the ACAP (Adaptive Compute Acceleration Platform), designed to deliver the most dynamic processor technology in the industry and enable the adaptable, intelligent and connected world of the future in a multitude of markets including Data Center (Compute, Storage and Networking); Wireless/5G and Wired Communications; Automotive/ADAS; Emulation & Prototyping; Aerospace & Defense; Industrial Scientific & Medical, and others. Xilinx's core strengths simultaneously address major industry trends including the explosion of data, heterogeneous computing after Moore's Law, and the dawn of artificial intelligence (AI).
Senior FPGA Design Engineer
A talented senior digital design engineer is required to join the IP Design Solutions team - an expert engineering team that develops new technologies to help Xilinx excel in new or developing markets. In doing this, the team works very tightly with key customers.
The role involves work on all aspects of the FPGA design flow including architecture specification, RTL design, synthesis and verification. The successful candidate will work as part of an experienced design team and will thus have enormous opportunities for learning and self-development. There are currently opportunities to work on projects that target the end goal of deploying Xilinx devices in data-centers for the purpose of acceleration of compute and networking functions. The position is likely to require some travel to Xilinx sites and customer sites.
Capability in defining innovative new products that solve real world problems and ability to deliver high quality, complex projects on time
Assesses proposed features to determine feasibility
Ability to communicate technical information in an organised and understandable fashion
Implement designs (e.g., architecture, circuit design, RTL coding, synthesis, integration, verification, debugging, TCL coding, and timing analysis)
Ability to work within a team
Create an infrastructure to test designs in a hardware verification environment and run test scenarios
Problem solving and debugging skills
Actively explore innovative design implementation tools or methods and their impact on design practices
Ability to stay current with and propose the internal use of industry approaches, algorithms, and practices
Experience in writing technical documentation, including Specifications, Test Plans and User Guides
Knowledge in the following areas is desirable but non-essential:
TCL scripting language
P4 – a programming language for packet processing
Content Addressable Memories
Applications that are bound by memory bandwidth
- Degree in Computer or Electronic Engineering or similar qualification
- Minimum Experience:
- Bachelor’s degree + 8 years,
- Master’s degree + 7 years,
- PhD + 5 years