DescriptionXilinx develops highly flexible and adaptive processing platforms that enable rapid innovation across a variety of technologies - from the endpoint to the edge to the cloud. Xilinx is the inventor of the FPGA, hardware programmable SoCs and the ACAP (Adaptive Compute Acceleration Platform), designed to deliver the most dynamic processor technology in the industry and enable the adaptable, intelligent and connected world of the future in a multitude of markets including Data Center (Compute, Storage and Networking); Wireless/5G and Wired Communications; Automotive/ADAS; Emulation & Prototyping; Aerospace & Defense; Industrial Scientific & Medical, and others. Xilinx's core strengths simultaneously address major industry trends including the explosion of data, heterogeneous computing after Moore's Law, and the dawn of artificial intelligence (AI).
Xilinx is seeking an ASIC/SOC design engineer for development of next generation high-performance, low-power processor engines for accelerating machine learning/artificial intelligence applications. As part of the front-end design team, you will participate in microarchitecture design, RTL implementation, analysis and optimization of power/performance, development of timing constraints/SDC, and design checks with Lint/CDC/RDC/DFT DRC tools. You will work closely with architecture, verification/validation, physical design teams to ensure successful IP delivery throughout the complete cycle of design, implementation, and silicon bringup.
Strong knowledge of low power digital design and analysis