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Product Engineer - FPGA Implementation SW

156155
San Jose, CA, United States
Nov 7, 2018

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Job Description

Description

Xilinx develops highly flexible and adaptive processing platforms that enable rapid innovation across a variety of technologies - from the endpoint to the edge to the cloud. Xilinx is the inventor of the FPGA, hardware programmable SoCs and the ACAP (Adaptive Compute Acceleration Platform), designed to deliver the most dynamic processor technology in the industry and enable the adaptable, intelligent and connected world of the future in a multitude of markets including Data Center (Compute, Storage and Networking); Wireless/5G and Wired Communications; Automotive/ADAS; Emulation & Prototyping; Aerospace & Defense; Industrial Scientific & Medical, and others. Xilinx's core strengths simultaneously address major industry trends including the explosion of data, heterogeneous computing after Moore's Law, and the dawn of artificial intelligence (AI).

Our global team is growing and we are looking for bold, collaborative and creative people to help us lead the industry transformation to build an adaptable intelligent world. We believe that by embracing diverse ideas, striving for excellence in all that we do, and working together as a unified team, we can accomplish anything. Come do your best work and live your best life as part of the ONEXILINX team!

 

The Product Management Engineer position is in the FPGA Implementation Software group, located in San Jose (California), for an application engineer to focus on tools feature roadmap definition, specification, validation, documentation, train the trainer material and key customers support. Under the supervision of experienced Product Engineers, the successful candidate will work closely with several R&D teams, internal application design teams and tier-1 customers to improve FPGA compilation software quality of results and ease of use in order to enable the next generation of designs on the current FPGA families and coming up ACAP families. Daily activities will include the following duties:

  • Deep-diving on new and critical tool issues seen by customers to identify work-arounds and future enhancements. Triaging reported issues in the implementation tools product area and help engineering address them effectively.
  • Actively exploring innovative methodologies and their impact on flow and design practices, with emphasis on synthesis (C/C++/RTL), logic optimization, placement, routing.
  • Tracking product development schedules and issues, and validating the readiness of new or enhanced features in any new Vivado release.
  • Developing and delivering training materials on new features and methodologies.
  • Authoring high quality documentation tuned to the needs of the reader for their areas of expertise
  • Staying current with and proposing the internal use of industry approaches, algorithms, and practices

BS or equivalent work experience in Electrical Engineering or similar technology area, with minimum 3 years of relevant experience.

  • Customer Awareness: Has excellent working knowledge of RTL-based design flows and expectations.
  • Product Knowledge: Has good working knowledge of the entire FPGA or ASIC design process and tool flow, with basic understanding in timing analysis and closure. Scripting experience (Tcl, Perl, Python) is desired.
  • Design Enablement: Has good understanding of design methodologies for timing closure and runtime reduction.
  • Problem Solving: Ability to handle and solve complex system level issues.
  • Technical Communication: Can simplify and communicate even the most complex subjects, making options, tradeoffs, and impact clear.
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