UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

Technical Senior Design Manager - Memory Sub-System

156047
San Jose, CA, United States
Jun 21, 2019

Share:

Job Description

Description

At Xilinx, we are leading the industry transformation to build an adaptable, intelligent world. ARE YOU bold, collaborative, and creative? At Xilinx, we hire and develop leaders and innovators who want to revolutionize the world of technology.  We believe that by embracing diverse ideas, pushing boundaries, and working together as ONEXILINX, anything is possible. 

Our culture of innovation began with the invention of the Field Programmable Gate Array (FPGA), and with the 2018 introduction of our Adaptive Compute Acceleration Platform (ACAP), has made a quantum leap in capability, solidifying our role as the adaptable platform supplier of choice.  From the start, we have always believed in providing inventors with products and platforms that are infinitely adaptable. From self-driving cars, to world-record genome processing, to AI and big data, to the world’s first 5G networks, we empower the world’s builders and visionaries whose ideas solve every day problems and enhance people’s lives.

If you are PASSIONATE, ADAPTABLE, and INNOVATIVE, Xilinx is the right place for you!  At Xilinx we care deeply about creating meaningful development experiences while building a strong sense of belonging and connection. We foster an environment of empowered learning, wellness, community engagement, and recognition, so you can focus on work that matters – world class technology that improves the way we live and work.  We are ONEXILINX.

Job Description:

 

Responsible for design and implementation of sub-systems such as IO and memory. 
  • Micro architecture and RTL implementation.
  • Architecture and performance.
  • Work with Physical design for timing constraints, timing closure and Physical implementation.
  • Knowledge of DFx.
  • Knowledge of FPGA design implementation.


Education Requirements

BS, MS or PhD in Electrical Engineering, Computer Engineering or related equivalent


Years of Experience

BS with 12+ years or MS with 8+ years or PhD with 5+ years of industry design experience

 

  • Strong foundation in SoC architecture with Memory interfaces
  • Strong analytical problem solving and attention to detail
  • Expertise in HDL, Verification and design concepts
  • Excellent written and verbal communication skills
  • Excellent interpersonal skills
Share:
 
Refer to the Talent Network

Similar Jobs

Software Development Leader – DevOps Team

San Jose, CA, United States

Senior Software Engineer

San Jose, CA, United States

Senior Software Engineer DevOps

San Jose, CA, United States

Digital Forensic Investigations Analyst

San Jose, CA, United States

Global Security Operations Manager

San Jose, CA, United States

Senior Characterization Engineer

San Jose, CA, United States

Technical Program Manager

San Jose, CA, United States

Technical Program Manager, Software

San Jose, CA, United States

Technical Sales Lead - San Jose

San Jose, CA, United States

Senior Software Engineer DevOps

San Jose, CA, United States

Senior Software Engineer DevOps

San Jose, CA, United States

Systems Design Engineer Intern

San Jose, CA, United States

Embedded Software Engineer

San Jose, CA, United States

Global Sales Finance Analyst - Revenue

San Jose, CA, United States

EDA (Place & Route) Engineer

San Jose, CA, United States

Senior Pricing & Quoting Analyst

San Jose, CA, United States

Staff Customer Quality Engineer

San Jose, CA, United States

Senior DSP Software Engineer

San Jose, CA, United States

Staff Software (EDA) Engineer

San Jose, CA, United States

Heterogenous MultiCore Compiler Engineer

San Jose, CA, United States

FPGA Design Engineer

San Jose, CA, United States

Staff SoC Verification Engineer - PCIe

San Jose, CA, United States

Senior Hardware Design Engineer

San Jose, CA, United States

SerDes Architecture and Modeling Engineer

San Jose, CA, United States