Xilinx is looking for an experienced and motivated leader to join the DataCenter
solutions, PCIe Connectivity, and Networking Acceleration engineering team.
As part of this team, you will play a key role in the design and implementation
of next generation FPGA-based intellectual property (IP) blocks for the cloud
scale-out data centers. IP includes Machine Learning, PCI Express, Multi-
Queue DMA, Networking Acceleration, and other protocols.
Come join us and be part of team that delivers world-class products that
set the industry standard for quality, ease of use and customer support. In
this role, you will have the opportunity to drive the design, verification, and
validation of FPGA hard IP blocks as well has companion soft solution IP block.
In addition you will work across the hardware/software boundary.
Education Requirements: Minimum of a BSEE/MSEE or related equivalent
Years of Experience: BS 8+ years, MS 6+ years or PhD 3+ years design experience
- Knowledge in multi-queue DMA and Networking implementations is a plus
- Experience with mirco architecture, design, and implementation of complex logic
- Experience with Verilog required
- Experience with FPGA design a plus
- Knowledge of PCIe, AXI, Networking protocols a plus
- Ability to quickly analyze and debug RTL issues
- Excellent oral and written communication skills