Xilinx develops highly flexible and adaptive processing platforms that enable rapid innovation - from the endpoint to the edge to the cloud. Xilinx is the inventor of the FPGA, programmable SoCs and the ACAP, designed to deliver the most dynamic processor technology in the industry and enable adaptable, intelligent computing.
If you are a passionate, innovative and an out-of-the-box thinker that enjoys challenging projects, Xilinx is the right place for you. Our global team is growing and we are looking for bold, collaborative and creative people to help deliver groundbreaking technologies that build an adaptable intelligent world. Come do your best work and live your best life through collaboration, wellness and giving back to your community as a member of the ONEXILINX team.
Modern MPSoC include CPU, GPU, reconfigurable logic and various specific accelerators (DSP, video CODEC...) and I/O subsystems (100 GigE, PCIe, memory buses...). This complexity makes them versatile systems that can be used as application accelerators but this also makes their use difficult compared to simpler CPU-only environments.
Fortunately, at the same time there are various open standards for heterogeneous computing, such as OpenCL or OpenMP 5, being developed to ease the programming of accelerators.
The Domain Specific Languages (DSL) are an interesting high-level approach to simplify programming by specializing on the problems to be solved. SYCL is a DSL based on single-source pure modern C++ to represent the concepts used to program accelerators directly as C++ class without any extension or compiler to avoid portability issues.
The goal of this internship is to develop a SYCL open-source environment targeted at the new Xilinx ACAP systems:
- a first part is to extend the triSYCL runtime implementation based on OpenCL and OpenMP API to some new target back-end API;
- a second part is to improve the current triSYCL device compiler based on open-source compiler Clang/LLVM able to extract the code of the computational kernels and generate the SPIR 2.0 portable intermediate representation to address the Xilinx target tool-chains;
- improve the performance of triSYCL by collaborating with the various Xilinx teams;
- use & extend some applications such as the SYCL C++17 ParallelSTL or some machine learning applications such as TensorFlow Eigen/SYCL to work with triSYCL;
- in parallel to the implementation, a prospective research to define the standards themselves will be done.
The position is based in San Jose (California, USA) and suited typically for master or PhD students in an area related to compilation.
The candidate will have the opportunity to get involved into advanced technologies through the standardization committees of Khronos OpenCL & SYCL, SPIR, Vulkan, OpenMP and C++, and meet all the leading companies and laboratories behind these technologies.
Required skills: compilation & compiler experience, modern C++.
To apply, *do not send e-mail* but apply directly to https://xilinx.referrals.selectminds.com on reference 155436.
Typical internship is at least 6 months.
The areas and subjects of the internship are:
- C++17, C++20, STL, Boost;
- DSL & DSeL;
- implementing parallel languages and run-times (SYCL 1.2.1
https://www.khronos.org/sycl and OpenMP 5 http://openmp.org);
- compilation (Clang/LLVM http://llvm.org/ and SPIR-V
- FPGA, DSP & accelerators;
- HPC, real-time applications and libraries.
Typical tools used:
- open-source software used for C++ development (Emacs, RTags...);
On-going MSc or PhD with experience in compilation & compiler, modern C++.