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Staff Design Engineer (Analog/Mixed-signal)

155349
San Jose, CA, United States
May 13, 2018

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Job Description

Description

Xilinx is the world's leading provider of All Programmable FPGAs, SoCs and 3D ICs. These industry-leading devices are coupled with a next-generation design environment and IP to serve a broad range of customer needs, from programmable logic to programmable systems integration. Our All Programmable devices underpin today's most advanced electronics. Among the broad range of end markets we serve are:

  • Aerospace/Defense
  • Automotive
  • Broadcast
  • Consumer
  • High Performance Computing
  • Industrial / Scientific / Medical (ISM)
  • Wired
  • Wireless

 

Define, design, verify, and document for Xilinx ASIC circuit development.  Research, design, and determine analog/mixed-signal circuits intended for high-speed backplane and inter-chip communication. Define sub-circuit interfaces specs for simulation. Contribute to the development of multidimensional designs involving the layout of complex integrated circuits. Apply knowledge of transistor behavior and operation to the design of circuits such as transmitters, receivers and clock-generation circuitry. Perform transistor-level feasibility studies for analog/mixed-signal blocks, floor plan, and work with layout designers to implement circuit designs, and define test plans to validate and characterize designs for high-volume production.
 
#DN-LNI

Education:
  • Master or foreign equivalent in Electrical Engineering, Electronics Engineering or related field.
Experience:
  • 2 years experience as Design Engineer, Analog Engineer, Analog Design Engineer, Engineering Intern, Research Intern or related occupation. 
Alternate Requirements:
  • Will also accept a Ph.D. or foreign equivalent in Electrical Engineering, Electronics Engineering or related field plus zero experience

Special Requirements:

  • Must have at least 1 year prior work experience or advanced coursework in the following: 
    1. 3D-Modeling and simulating RF structures including inductors, capacitors, transmission lines
    2. Mixed-signal verification methodology         
    3. Analog design methodology, including circuit simulation with high-precision layout parasitic extraction
    4. Design and simulation of low phase noise crystal oscillator (XO), amplifiers and clock distribution circuits
    5. Laboratory characterization of clock jitter and phase noise of the XO circuits
    6. Design and simulation of power management module for Near Field Communication (NFC) including Low Drop Out (LDO) regulator and control circuits

#DN-LNI

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