Video is becoming a key workload in Datacenters. Existing architectures are performing sub-optimally for highly complex video workloads like h.264, HEVC and VP9 encoding. FPGAs are programmable, low power and offer significant acceleration capabilities.
The successful candidate will be part of the video R&D team developing video processing solutions, including next generation video encoding technologies. You will drive the algorithm design and implementation of the AV1 video encoder, optimizing encoder algorithms such as mode decision, motion estimation, rate control, etc., enhancing quality through machine learning, and work with hardware, software and integration teams to come up with compelling solutions for various Xilinx silicon platforms.
As a member of a creative, talented and motivated team, you will be a key contributor to the Video Datacenter Compute Acceleration portfolio.
- Lead the design of the AV1 encoder architecture its functional models and data structures for efficient hardware and software implementation.
- Develop the AV1 reference model, targeting real-time video encoding on Xilinx devices
- Be responsible from concept to implementation of related algorithms like pre-processing, look-ahead, etc. for superior encoder performance while balancing complexity and implementation cost.
- Expert in C level coding and debugging and optimizing software modules for performance improvement for Xilinx platforms.
- Participation in development of reference designs that utilize key video IP blocks for datacenter applications
- Participation in developing drivers and/or APIs for the encoder, aligned with the software architectural framework requirements and application frameworks like FFmpeg
- Support the creation of test benches and hardware validation platforms to verify and validate the compliance of the eoncder to design requirements and Xilinx IP design standards
- Create specification and support documentation
- Proven background in digital image/video processing and video encoding technologies.
- Hand's on experience in relevant multimedia compression standards such as HEVC, H.264, VP9, AV1 and/or their related extensions
- Software development skills. Proficiency in C and/or C++
- Proven record of encoder algorithm development experience, preferably with evidence of high-quality research results through publications and/or granted patents.
- Proven participation in encoder standardization bodies is a plus
- Great analytical and debugging skills. Experience with code optimization for SIMD based VLIW architectures is a plus.
- Experience with video visual quality assessment and improvement
- Excellent communication skills (written, and verbal).
- Track record of successful execution and delivery of complex projects
- Must be a team player with good oral and written communication skills
- PhD or MS in Electrical Engineering or Computer Science required.
- 10+ years of relevant industry experience; 5+ years of experience in a management and technical leadership role.