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Staff SerDes Validation Engineer

155274
San Jose, CA, United States
May 2, 2018

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Job Description

Description

Xilinx is the leading provider of All Programmable FPGAs, SoCs, MPSoCs and 3DICs. Xilinx's all-programmable devices are designed into tens of thousands of products that improve the quality of the everyday lives of billions of people worldwide. For over 30 years, Xilinx has been behind some of the greatest advancements in technology and science - from the industry's first fabless semiconductor model to the NASA Curiosity Mars Rover, to today's autonomous vehicles and hyperscale data centers. Xilinx uniquely enables applications that are both software-defined, yet hardware optimized - enabling smart, connected and differentiated applications across technology's biggest megatrends, including Machine Learning, 5G Wireless, Embedded Vision, Industrial IoT and Cloud Computing and more.

If you are a passionate, innovative and an out-of-the-box thinker that enjoys challenging projects, Xilinx is the right place for you. Our global team is growing and we are looking for bold, collaborative, and creative people to help deliver groundbreaking technologies that enable our customers to differentiate. Come do your best work and live your best life through collaboration, wellness and giving back to your community as a member of the ONEXILINX team.

 

 

As a senior member of the SerDes System Engineering and Validation team, you will use your knowledge of high speed SerDes technology to lead validation efforts on Xilinx transceivers.
 
Responsibilities:
 
  • Define methodologies for validating high speed transceiver blocks
  • Ensure transceiver meets protocol compliance requirements for standards such as PCIe, OIF and 802.3
  • Work with customers to define system level tests and create demos
  • Work with Design and Architecture teams to correlate silicon performance with simulations
  • Develop FPGA test designs, firmware and software to validate transceivers
  • Review PCB design for high speed transceiver characterization boards
  • Mentor junior engineers on emerging methodologies and protocol standards 

 

 

Qualifications:
  • Bachelor's Degree in Electrical Engineering or Computer Science or related fields with 10+ years or MS in EE, CS or related fields with 8+ years of work experience with high speed transceiver testing
  • Hands on experience with test equipment such as scopes, BERTs and Analyzers
  • Experience with test and debug of PAM-4 links
  • Experience in Python/C++
  • Familiarity with FPGA design flow is a plus
  • Familiarity with SI analysis tools such as HFSS is a plus
  • Strong written and verbal skills
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