Xilinx develops highly flexible and adaptive processing platforms that enable rapid innovation across a variety of technologies - from the endpoint to the edge to the cloud. Xilinx is the inventor of the FPGA, hardware programmable SoCs and the ACAP (Adaptive Compute Acceleration Platform), designed to deliver the most dynamic processor technology in the industry and enable the adaptable, intelligent and connected world of the future in a multitude of markets including Data Center (Compute, Storage and Networking); Wireless/5G and Wired Communications; Automotive/ADAS; Emulation & Prototyping; Aerospace & Defense; Industrial Scientific & Medical, and others. Xilinx's core strengths simultaneously address major industry trends including the explosion of data, heterogeneous computing after Moore's Law, and the dawn of artificial intelligence (AI).
Our global team is growing and we are looking for bold, collaborative and creative people to help us lead the industry transformation to build an adaptable intelligent world. We believe that by embracing diverse ideas, striving for excellence in all that we do, and working together as a unified team, we can accomplish anything. Come do your best work and live your best life as part of the ONEXILINX team!
Xilinx is looking for a talented individual to join the high speed memory interfaces design engineering group, in the position of Design Engineer to work on development of next generation highly configurable blocks that operate at over 1 GHz data rate.
The successful candidate will work as a contributing member responsible for the architecture and design of next generation memory interfaces that operate over 4 GHz data rate for Xilinx customers. Responsibilities include RTL development, resolving system level challenges, architecting, implementing, documenting and validating the memory controller IP cores. The area of focus would be on high speed memory interfaces like DDR4, LPDDR4, DDR3, QDR4, LPDDR3 and RLDRAM3. The candidate must have excellent inter-personal and communication skills and be able to work independently.
Xilinx holds a strong position in the FPGA all programmable paradigm. This position offers candidates exposure to the latest generation IP, tools, boards, FPGA products and the ability to design and develop high speed memory IP cores.
· B.E/M.E/M.Tech or B.S/M.S in EE/CE with 5+ years of relevant experience
· 3+ years of experience in designing complex IP’s
· Excellent Verilog and logic design concepts
· Experience with automation using scripting techniques such as PERL, Python or TCL
· Knowledge of bus protocols like AXI/AHB
· Excellent waveform debug skills using front end industry standard design tools like VCS, NCSIM, and ModelSim.
· Excellent communication and problem solving skills.
· Should have experience working in geographically dispersed team and should be a strong team player