DescriptionXilinx develops highly flexible and adaptive processing platforms that enable rapid innovation across a variety of technologies - from the endpoint to the edge to the cloud. Xilinx is the inventor of the FPGA, hardware programmable SoCs and the ACAP (Adaptive Compute Acceleration Platform), designed to deliver the most dynamic processor technology in the industry and enable the adaptable, intelligent and connected world of the future in a multitude of markets including Data Center (Compute, Storage and Networking); Wireless/5G and Wired Communications; Automotive/ADAS; Emulation & Prototyping; Aerospace & Defense; Industrial Scientific & Medical, and others. Xilinx's core strengths simultaneously address major industry trends including the explosion of data, heterogeneous computing after Moore's Law, and the dawn of artificial intelligence (AI).
Xilinx Serdes Technology Group develops high-performance, multi-protocol wireline transceivers in state-of-the-art CMOS process. We are currently seeking an analog/mixed-signal design intern to join our world-class team.
The candidate will be responsible for the design of a high-speed ADC-based receiver or DAC-based transmitter
- Define DAC/ADC circuit architecture optimized for a PAM4 electrical an optical links
- Perform link level simulation in Matlab or HSPICE to proof the architecture
- Design circuit components (e.g. SAR-ADC, S/H, Analog Front-end) required to implement the architecture in advanced FinFET process
This position is open for Ph.D students interested in pursuing career in analog/mixed signal circuit design. The candidates must have taken a graduate-level circuit design classes covering analog/digital circuit design and data-converters. Hands-on experience using circuit simulators as part of a class design project and project/lab-work experience in high-speed circuit design and high-speed data converters are a plus.