Xilinx is the leading provider of All Programmable FPGAs, SoCs, MPSoCs and 3DICs. Xilinx's all-programmable devices are designed into tens of thousands of products that improve the quality of the everyday lives of billions of people worldwide. For over 30 years, Xilinx has been behind some of the greatest advancements in technology and science - from the industry's first fabless semiconductor model to the NASA Curiosity Mars Rover, to today's autonomous vehicles and hyperscale data centers. Xilinx uniquely enables applications that are both software-defined, yet hardware optimized - enabling smart, connected and differentiated applications across technology's biggest megatrends, including Machine Learning, 5G Wireless, Embedded Vision, Industrial IoT and Cloud Computing and more.
If you are a passionate, innovative and an out-of-the-box thinker that enjoys challenging projects, Xilinx is the right place for you. Our global team is growing and we are looking for bold, collaborative, and creative people to help deliver groundbreaking technologies that enable our customers to differentiate. Come do your best work and live your best life through collaboration, wellness and giving back to your community as a member of the ONEXILINX team.
Xilinx is seeking a IC Design Verification Engineer to join our Serdes Technology Group in the Hardware and System Product Develop on a contract basis to perform the following key activities:
• Develop and Review Test Plan based on design specification
• Develop constrained-Random verification environment for complex DUT
• Implement coverage matrix using cover point and assertion
• Create and debug tests for DUT
• Resolve bugs with remote designers
The successful candidate should possess/be at minimum
• 5 years of hands on experience with SystemVerilog/UVM
• Bachelor/Masters Degree in Electrical/Electronics/Computer Engineering
• Strong understanding of verification process from test plan to coverage completion
• Strong communication and Analytical skills
• Understanding of HDL (Verilog, VHDL)
• Experience with designing with FPGA using Vivado is a plus