DescriptionXilinx develops highly flexible and adaptive processing platforms that enable rapid innovation across a variety of technologies - from the endpoint to the edge to the cloud. Xilinx is the inventor of the FPGA, hardware programmable SoCs and the ACAP (Adaptive Compute Acceleration Platform), designed to deliver the most dynamic processor technology in the industry and enable the adaptable, intelligent and connected world of the future in a multitude of markets including Data Center (Compute, Storage and Networking); Wireless/5G and Wired Communications; Automotive/ADAS; Emulation & Prototyping; Aerospace & Defense; Industrial Scientific & Medical, and others. Xilinx's core strengths simultaneously address major industry trends including the explosion of data, heterogeneous computing after Moore's Law, and the dawn of artificial intelligence (AI).
SDAccel is the next generation software programming environment to enable application developers with little or no FPGA expertise to use high level programming languages, such as OpenCL, C and C++, to leverage the power of programmable hardware for application acceleration.
This position offers the opportunity to design and implementation of significant parts of SDAccel OpenCL compiler. You will get a chance to tackle many interesting and challenging problems working on compiler for cutting-edge FPGA hardware.
• Knowledge of LLVM/Clang and open source development
• Knowledge of computer architecture, especially memory subsystem
• Experience with OpenCL or CUDA is a plus
• Experience with Clang AST matcher and Clang tooling is a plus