Staff SW Engineer – System Compilers for Heterogeneous Computing
Software-defined systems on-chip and hardware-accelerated systems are entering the mainstream, and now represent major drivers in the evolution of the programmable logic industry. Xilinx is in the forefront of developing design tools and technologies for programmable and reconfigurable hardware, and it is now possible to automatically generate high-performance accelerator systems from programs written in C/C++ and OpenCL. These tools enable performance-oriented programmers to target programmable platforms while continuing to work within familiar software design flows.
The System Compiler team is looking for exceptional compiler experts to help us refine and develop design tools for heterogeneous computing in the data center and in embedded systems, targeting current and future SoC, FPGA, and ACAP devices. Our tools are used today to develop high-performance systems for advanced driver assistance, real-time image processing, video transcoding, genomics, and machine learning.
We are tackling interesting open problems in system compilation, with many opportunities to innovate and advance the state of the art in hardware/software system compilation, heterogeneous computing, embedded systems design, and run-time software. Successful candidates thrive working independently and collaboratively as part of a tight-knit team on challenging problems that hinder productivity today, while building tools to solve tomorrow’s problems.
You bring passion and a track record of getting stuff done that users care about. You are confident in your abilities, comfortable sharing ideas in their early stages, and know how to listen and collaborate with others to develop ideas towards common goals. Most importantly, you know how to turn good ideas into products, with a commitment to robustness and quality. You have a nose for identifying tractable relevant problems that may not have obvious solutions, and eat your own cooking because you know it’s the right thing to do.
Specific responsibilities will vary based on your strengths and areas of expertise, but will be drawn from one or more of the following areas:
- Compiler development in LLVM, e.g., inter-procedural analysis and optimization, dependence analysis, global optimization, automatic parallelization.
- Performance tuning and refinements of generated system hardware / software, tools, and run-time software, identifying bottlenecks and implementing scalable strategies to address them. Considerations include memory access optimization, pipelining, implications of caching, accelerator task control, interrupt handling, profiling-based optimization.
- High performance accelerator-based systems in machine learning, computer vision, image and signal processing, cryptography, or digital communications, with ability to translate insights and experience into algorithms and systems schema that can be realized in design tools
- Compiler development experience in LLVM/Clang
- Experience developing accelerators and runtime systems for FPGAs, GPUs, DSPs, SoCs, or hardware accelerators; familiarity with Zynq® family SoC design or PCIe-based FPGA accelerators a plus
- Strong C/C++ programming and problem solving skills
- Strong decision making skills and judgement
- Must be a hands-on, self-starter who makes and follows through on commitments
- Excellent written and verbal communication skills
- MS in CS/EE (PhD preferred) and 5+ years of experience, or equivalent. Exceptional recent grads will be given full consideration.